GMCON_PGFSM_CONFIG__RSRVD__SHIFT  383 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define GMCON_PGFSM_CONFIG__RSRVD__SHIFT 0x0000000e
GMCON_PGFSM_CONFIG__RSRVD__SHIFT 5226 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_0_sh_mask.h #define GMCON_PGFSM_CONFIG__RSRVD__SHIFT 0xe
GMCON_PGFSM_CONFIG__RSRVD__SHIFT 5866 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define GMCON_PGFSM_CONFIG__RSRVD__SHIFT 0xe
GMCON_PGFSM_CONFIG__RSRVD__SHIFT 6462 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define GMCON_PGFSM_CONFIG__RSRVD__SHIFT 0xe
GMCON_PGFSM_CONFIG__RSRVD__SHIFT 6340 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_2_sh_mask.h #define GMCON_PGFSM_CONFIG__RSRVD__SHIFT 0xe