GLOBAL_CONTROL_CONTROLLER_RESET 3760 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_enum.h typedef enum GLOBAL_CONTROL_CONTROLLER_RESET {
GLOBAL_CONTROL_CONTROLLER_RESET 3763 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_enum.h } GLOBAL_CONTROL_CONTROLLER_RESET;
GLOBAL_CONTROL_CONTROLLER_RESET 4258 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_enum.h typedef enum GLOBAL_CONTROL_CONTROLLER_RESET {
GLOBAL_CONTROL_CONTROLLER_RESET 4261 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_enum.h } GLOBAL_CONTROL_CONTROLLER_RESET;
GLOBAL_CONTROL_CONTROLLER_RESET 8968 drivers/gpu/drm/amd/include/navi10_enum.h typedef enum GLOBAL_CONTROL_CONTROLLER_RESET {
GLOBAL_CONTROL_CONTROLLER_RESET 8971 drivers/gpu/drm/amd/include/navi10_enum.h } GLOBAL_CONTROL_CONTROLLER_RESET;
GLOBAL_CONTROL_CONTROLLER_RESET 10141 drivers/gpu/drm/amd/include/vega10_enum.h typedef enum GLOBAL_CONTROL_CONTROLLER_RESET {
GLOBAL_CONTROL_CONTROLLER_RESET 10144 drivers/gpu/drm/amd/include/vega10_enum.h } GLOBAL_CONTROL_CONTROLLER_RESET;