GENS0__SENSE_SWITCH_MASK 11019 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h #define GENS0__SENSE_SWITCH_MASK 0x10
GENS0__SENSE_SWITCH_MASK 10831 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h #define GENS0__SENSE_SWITCH_MASK 0x10
GENS0__SENSE_SWITCH_MASK 12085 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h #define GENS0__SENSE_SWITCH_MASK 0x10
GENS0__SENSE_SWITCH_MASK 2218 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h #define GENS0__SENSE_SWITCH_MASK                                                                              0x10L
GENS0__SENSE_SWITCH_MASK 7175 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h #define GENS0__SENSE_SWITCH_MASK 0x00000010L
GENS0__SENSE_SWITCH_MASK 10635 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_sh_mask.h #define GENS0__SENSE_SWITCH_MASK 0x10
GENS0__SENSE_SWITCH_MASK  857 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_sh_mask.h #define GENS0__SENSE_SWITCH_MASK                                                                              0x10L
GENS0__SENSE_SWITCH_MASK  268 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h #define GENS0__SENSE_SWITCH_MASK                                                                              0x10L