GENMO_WT__VGA_CKSEL__SHIFT 10994 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h #define GENMO_WT__VGA_CKSEL__SHIFT 0x2
GENMO_WT__VGA_CKSEL__SHIFT 10806 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h #define GENMO_WT__VGA_CKSEL__SHIFT 0x2
GENMO_WT__VGA_CKSEL__SHIFT 12060 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h #define GENMO_WT__VGA_CKSEL__SHIFT 0x2
GENMO_WT__VGA_CKSEL__SHIFT 2205 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h #define GENMO_WT__VGA_CKSEL__SHIFT                                                                            0x2
GENMO_WT__VGA_CKSEL__SHIFT 7166 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h #define GENMO_WT__VGA_CKSEL__SHIFT 0x00000002
GENMO_WT__VGA_CKSEL__SHIFT 10610 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_sh_mask.h #define GENMO_WT__VGA_CKSEL__SHIFT 0x2
GENMO_WT__VGA_CKSEL__SHIFT  844 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_sh_mask.h #define GENMO_WT__VGA_CKSEL__SHIFT                                                                            0x2
GENMO_WT__VGA_CKSEL__SHIFT  255 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h #define GENMO_WT__VGA_CKSEL__SHIFT                                                                            0x2