GC_USER_RB_BACKEND_DISABLE__BACKEND_DISABLE_MASK 10554 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define GC_USER_RB_BACKEND_DISABLE__BACKEND_DISABLE_MASK                                                      0x00FF0000L
GC_USER_RB_BACKEND_DISABLE__BACKEND_DISABLE_MASK 6089 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define GC_USER_RB_BACKEND_DISABLE__BACKEND_DISABLE_MASK                                                      0x00FF0000L
GC_USER_RB_BACKEND_DISABLE__BACKEND_DISABLE_MASK 5563 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define GC_USER_RB_BACKEND_DISABLE__BACKEND_DISABLE_MASK                                                      0x00FF0000L
GC_USER_RB_BACKEND_DISABLE__BACKEND_DISABLE_MASK 5398 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define GC_USER_RB_BACKEND_DISABLE__BACKEND_DISABLE_MASK                                                      0x00FF0000L
GC_USER_RB_BACKEND_DISABLE__BACKEND_DISABLE_MASK 4236 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_sh_mask.h #define GC_USER_RB_BACKEND_DISABLE__BACKEND_DISABLE_MASK 0x00ff0000L
GC_USER_RB_BACKEND_DISABLE__BACKEND_DISABLE_MASK 4181 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h #define GC_USER_RB_BACKEND_DISABLE__BACKEND_DISABLE_MASK 0xff0000
GC_USER_RB_BACKEND_DISABLE__BACKEND_DISABLE_MASK 4909 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define GC_USER_RB_BACKEND_DISABLE__BACKEND_DISABLE_MASK 0xff0000
GC_USER_RB_BACKEND_DISABLE__BACKEND_DISABLE_MASK 5439 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define GC_USER_RB_BACKEND_DISABLE__BACKEND_DISABLE_MASK 0xff0000