GC_BASE__INST5_SEG0  505 drivers/gpu/drm/amd/include/arct_ip_offset.h #define GC_BASE__INST5_SEG0                        0
GC_BASE__INST5_SEG0  386 drivers/gpu/drm/amd/include/navi10_ip_offset.h #define GC_BASE__INST5_SEG0                        0
GC_BASE__INST5_SEG0  519 drivers/gpu/drm/amd/include/navi12_ip_offset.h #define GC_BASE__INST5_SEG0                        0
GC_BASE__INST5_SEG0  519 drivers/gpu/drm/amd/include/navi14_ip_offset.h #define GC_BASE__INST5_SEG0                        0
GC_BASE__INST5_SEG0  638 drivers/gpu/drm/amd/include/renoir_ip_offset.h #define GC_BASE__INST5_SEG0                        0
GC_BASE__INST5_SEG0  413 drivers/gpu/drm/amd/include/vega20_ip_offset.h #define GC_BASE__INST5_SEG0                        0