GC_BASE__INST0_SEG3  473 drivers/gpu/drm/amd/include/arct_ip_offset.h #define GC_BASE__INST0_SEG3                        0x00402C00
GC_BASE__INST0_SEG3  354 drivers/gpu/drm/amd/include/navi10_ip_offset.h #define GC_BASE__INST0_SEG3                        0
GC_BASE__INST0_SEG3  492 drivers/gpu/drm/amd/include/navi12_ip_offset.h #define GC_BASE__INST0_SEG3                        0
GC_BASE__INST0_SEG3  492 drivers/gpu/drm/amd/include/navi14_ip_offset.h #define GC_BASE__INST0_SEG3                        0
GC_BASE__INST0_SEG3  611 drivers/gpu/drm/amd/include/renoir_ip_offset.h #define GC_BASE__INST0_SEG3                        0
GC_BASE__INST0_SEG3  848 drivers/gpu/drm/amd/include/vega10_ip_offset.h #define GC_BASE__INST0_SEG3                       0
GC_BASE__INST0_SEG3  381 drivers/gpu/drm/amd/include/vega20_ip_offset.h #define GC_BASE__INST0_SEG3                        0