GC_BASE__INST0_SEG1  471 drivers/gpu/drm/amd/include/arct_ip_offset.h #define GC_BASE__INST0_SEG1                        0x0000A000
GC_BASE__INST0_SEG1  352 drivers/gpu/drm/amd/include/navi10_ip_offset.h #define GC_BASE__INST0_SEG1                        0x0000A000
GC_BASE__INST0_SEG1  490 drivers/gpu/drm/amd/include/navi12_ip_offset.h #define GC_BASE__INST0_SEG1                        0x0000A000
GC_BASE__INST0_SEG1  490 drivers/gpu/drm/amd/include/navi14_ip_offset.h #define GC_BASE__INST0_SEG1                        0x0000A000
GC_BASE__INST0_SEG1  609 drivers/gpu/drm/amd/include/renoir_ip_offset.h #define GC_BASE__INST0_SEG1                        0x0000A000
GC_BASE__INST0_SEG1  846 drivers/gpu/drm/amd/include/vega10_ip_offset.h #define GC_BASE__INST0_SEG1                       0x0000A000
GC_BASE__INST0_SEG1  379 drivers/gpu/drm/amd/include/vega20_ip_offset.h #define GC_BASE__INST0_SEG1                        0x0000A000