GCEA_EDC_CNT__IOWR_CMDMEM_SED_COUNT__SHIFT 10719 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define GCEA_EDC_CNT__IOWR_CMDMEM_SED_COUNT__SHIFT                                                            0x1a
GCEA_EDC_CNT__IOWR_CMDMEM_SED_COUNT__SHIFT   38 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define GCEA_EDC_CNT__IOWR_CMDMEM_SED_COUNT__SHIFT                                                            0x1a
GCEA_EDC_CNT__IOWR_CMDMEM_SED_COUNT__SHIFT 5581 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define GCEA_EDC_CNT__IOWR_CMDMEM_SED_COUNT__SHIFT                                                            0x1a