GCEA_EDC_CNT2__GMIWR_CMDMEM_SEC_COUNT__SHIFT 10739 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define GCEA_EDC_CNT2__GMIWR_CMDMEM_SEC_COUNT__SHIFT                                                          0x4
GCEA_EDC_CNT2__GMIWR_CMDMEM_SEC_COUNT__SHIFT   58 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define GCEA_EDC_CNT2__GMIWR_CMDMEM_SEC_COUNT__SHIFT                                                          0x4
GCEA_EDC_CNT2__GMIWR_CMDMEM_SEC_COUNT__SHIFT 5601 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define GCEA_EDC_CNT2__GMIWR_CMDMEM_SEC_COUNT__SHIFT                                                          0x4