GCEA_ADDRDEC0_RM_SEL_SECCS01__RM1__SHIFT 14804 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define GCEA_ADDRDEC0_RM_SEL_SECCS01__RM1__SHIFT                                                              0x4
GCEA_ADDRDEC0_RM_SEL_SECCS01__RM1__SHIFT 9188 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define GCEA_ADDRDEC0_RM_SEL_SECCS01__RM1__SHIFT                                                              0x4
GCEA_ADDRDEC0_RM_SEL_SECCS01__RM1__SHIFT 9034 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define GCEA_ADDRDEC0_RM_SEL_SECCS01__RM1__SHIFT                                                              0x4