FBC_IND_LUT1__FBC_IND_LUT1__SHIFT 9352 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h #define FBC_IND_LUT1__FBC_IND_LUT1__SHIFT 0x0
FBC_IND_LUT1__FBC_IND_LUT1__SHIFT 9052 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h #define FBC_IND_LUT1__FBC_IND_LUT1__SHIFT 0x0
FBC_IND_LUT1__FBC_IND_LUT1__SHIFT 10308 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h #define FBC_IND_LUT1__FBC_IND_LUT1__SHIFT 0x0
FBC_IND_LUT1__FBC_IND_LUT1__SHIFT 3170 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h #define FBC_IND_LUT1__FBC_IND_LUT1__SHIFT                                                                     0x0
FBC_IND_LUT1__FBC_IND_LUT1__SHIFT 6858 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h #define FBC_IND_LUT1__FBC_IND_LUT1__SHIFT 0x00000000
FBC_IND_LUT1__FBC_IND_LUT1__SHIFT 9822 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_sh_mask.h #define FBC_IND_LUT1__FBC_IND_LUT1__SHIFT 0x0