F5 41 crypto/rmd160.c #define F5(x, y, z) (x ^ (y | ~z)) F5 41 crypto/rmd320.c #define F5(x, y, z) (x ^ (y | ~z)) F5 1072 drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c #define F5 131 F5 1321 drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c #define F5 177 F5 1386 drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c #define F5 225 F5 235 drivers/pinctrl/sh-pfc/pfc-r8a73a4.c #define F5(a) a##_MARK F5 273 drivers/pinctrl/sh-pfc/pfc-r8a73a4.c F1(SCIFA0_RTS), F5(SIM0_DET), F7(CSCIF0_RTS), /* Port32 */ F5 274 drivers/pinctrl/sh-pfc/pfc-r8a73a4.c F1(SCIFA0_CTS), F5(SIM1_DET), F7(CSCIF0_CTS), F5 275 drivers/pinctrl/sh-pfc/pfc-r8a73a4.c F1(SCIFA0_SCK), F5(SIM0_PWRON), F7(CSCIF0_SCK), F5 286 drivers/pinctrl/sh-pfc/pfc-r8a73a4.c F1(HSI_RX_WAKE), F2(SCIFB2_CTS_66), F3(MSIOF3_SYNC), F5(GenIO4), F5 288 drivers/pinctrl/sh-pfc/pfc-r8a73a4.c F1(HSI_RX_READY), F2(SCIFB1_TXD_67), F5(GIO_OUT3_67), F7(CHSCIF1_HTX), F5 289 drivers/pinctrl/sh-pfc/pfc-r8a73a4.c F1(HSI_RX_FLAG), F2(SCIFB2_TXD_68), F3(MSIOF3_TXD), F5(GIO_OUT4_68), F5 290 drivers/pinctrl/sh-pfc/pfc-r8a73a4.c F1(HSI_RX_DATA), F2(SCIFB2_RXD_69), F3(MSIOF3_RXD), F5(GIO_OUT5_69), F5 291 drivers/pinctrl/sh-pfc/pfc-r8a73a4.c F1(HSI_TX_FLAG), F2(SCIFB1_RTS_70), F5(GIO_OUT1_70), F6(HSIC_TSTCLK0), F5 293 drivers/pinctrl/sh-pfc/pfc-r8a73a4.c F1(HSI_TX_DATA), F2(SCIFB1_CTS_71), F5(GIO_OUT2_71), F6(HSIC_TSTCLK1), F5 295 drivers/pinctrl/sh-pfc/pfc-r8a73a4.c F1(HSI_TX_WAKE), F2(SCIFB1_RXD_72), F5(GenIO8), F7(CHSCIF1_HRX), F5 296 drivers/pinctrl/sh-pfc/pfc-r8a73a4.c F1(HSI_TX_READY), F2(SCIFB2_RTS_73), F3(MSIOF3_SCK), F5(GIO_OUT0_73), F5 306 drivers/pinctrl/sh-pfc/pfc-r8a73a4.c F2(KEYOUT7), F5(RFANAEN), IRQ(45), F5 317 drivers/pinctrl/sh-pfc/pfc-r8a73a4.c F1(STP_ISD_0), F2(PDM4_CLK_125), F3(MSIOF2_TXD), F5(SIM0_VOLTSEL0), F5 320 drivers/pinctrl/sh-pfc/pfc-r8a73a4.c F5(SIM1_VOLTSEL1), F1(TS_SPSYNC), F2(MSIOF7_RXD), F3(STP_ISSYNC_1), F5 322 drivers/pinctrl/sh-pfc/pfc-r8a73a4.c F5(SIM0_VOLTSEL1), /* Port130 */ F5 323 drivers/pinctrl/sh-pfc/pfc-r8a73a4.c F1(STP_OPWM_0), F5(SIM1_PWRON), F1(TS_SCK), F2(MSIOF7_SCK), F5 325 drivers/pinctrl/sh-pfc/pfc-r8a73a4.c F5(SIM1_VOLTSEL0), F1(TS_SDAT), F2(MSIOF7_TXD), F3(STP_ISD_1), F5 344 drivers/pinctrl/sh-pfc/pfc-r8a73a4.c F1(CS0_N), F5(SIM0_GPO1), F5 345 drivers/pinctrl/sh-pfc/pfc-r8a73a4.c F1(CS2_N), F5(SIM0_GPO2), F5 346 drivers/pinctrl/sh-pfc/pfc-r8a73a4.c F1(CS4_N), F2(VIO_VD), F5(SIM1_GPO0), F5 347 drivers/pinctrl/sh-pfc/pfc-r8a73a4.c F1(D15), F5(GIO_OUT15), F5 348 drivers/pinctrl/sh-pfc/pfc-r8a73a4.c F1(D14), F5(GIO_OUT14), F5 349 drivers/pinctrl/sh-pfc/pfc-r8a73a4.c F1(D13), F5(GIO_OUT13), F5 350 drivers/pinctrl/sh-pfc/pfc-r8a73a4.c F1(D12), F5(GIO_OUT12), /* Port210 */ F5 351 drivers/pinctrl/sh-pfc/pfc-r8a73a4.c F1(D11), F5(WGM_TXP2), F5 352 drivers/pinctrl/sh-pfc/pfc-r8a73a4.c F1(D10), F5(WGM_GPS_TIMEM_ASK_RFCLK), F5 353 drivers/pinctrl/sh-pfc/pfc-r8a73a4.c F1(D9), F2(VIO_D9), F5(GIO_OUT9), F5 354 drivers/pinctrl/sh-pfc/pfc-r8a73a4.c F1(D8), F2(VIO_D8), F5(GIO_OUT8), F5 355 drivers/pinctrl/sh-pfc/pfc-r8a73a4.c F1(D7), F2(VIO_D7), F5(GIO_OUT7), F5 356 drivers/pinctrl/sh-pfc/pfc-r8a73a4.c F1(D6), F2(VIO_D6), F5(GIO_OUT6), F5 357 drivers/pinctrl/sh-pfc/pfc-r8a73a4.c F1(D5), F2(VIO_D5), F5(GIO_OUT5_217), F5 358 drivers/pinctrl/sh-pfc/pfc-r8a73a4.c F1(D4), F2(VIO_D4), F5(GIO_OUT4_218), F5 359 drivers/pinctrl/sh-pfc/pfc-r8a73a4.c F1(D3), F2(VIO_D3), F5(GIO_OUT3_219), F5 360 drivers/pinctrl/sh-pfc/pfc-r8a73a4.c F1(D2), F2(VIO_D2), F5(GIO_OUT2_220), /* Port220 */ F5 361 drivers/pinctrl/sh-pfc/pfc-r8a73a4.c F1(D1), F2(VIO_D1), F5(GIO_OUT1_221), F5 362 drivers/pinctrl/sh-pfc/pfc-r8a73a4.c F1(D0), F2(VIO_D0), F5(GIO_OUT0_222), F5 363 drivers/pinctrl/sh-pfc/pfc-r8a73a4.c F1(RDWR_224), F2(VIO_HD), F5(SIM1_GPO2), F5 364 drivers/pinctrl/sh-pfc/pfc-r8a73a4.c F1(RD_N), F1(WAIT_N), F2(VIO_CLK), F5(SIM1_GPO1), F5 366 drivers/pinctrl/sh-pfc/pfc-r8a73a4.c F1(WE1_N), F5(SIM0_GPO0),