DVO_VREF_CONTROL__DVO_VREFPON__SHIFT 4112 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h #define DVO_VREF_CONTROL__DVO_VREFPON__SHIFT 0x0
DVO_VREF_CONTROL__DVO_VREFPON__SHIFT 4220 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h #define DVO_VREF_CONTROL__DVO_VREFPON__SHIFT 0x0
DVO_VREF_CONTROL__DVO_VREFPON__SHIFT 4684 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h #define DVO_VREF_CONTROL__DVO_VREFPON__SHIFT 0x0
DVO_VREF_CONTROL__DVO_VREFPON__SHIFT 10645 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h #define DVO_VREF_CONTROL__DVO_VREFPON__SHIFT                                                                  0x0
DVO_VREF_CONTROL__DVO_VREFPON__SHIFT 6742 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h #define DVO_VREF_CONTROL__DVO_VREFPON__SHIFT 0x00000000
DVO_VREF_CONTROL__DVO_VREFPON__SHIFT 4180 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_sh_mask.h #define DVO_VREF_CONTROL__DVO_VREFPON__SHIFT 0x0
DVO_VREF_CONTROL__DVO_VREFPON__SHIFT 41255 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_sh_mask.h #define DVO_VREF_CONTROL__DVO_VREFPON__SHIFT                                                                  0x0