DVO_VREF_CONTROL__DVO_VREFCAL__SHIFT 4116 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h #define DVO_VREF_CONTROL__DVO_VREFCAL__SHIFT 0x4
DVO_VREF_CONTROL__DVO_VREFCAL__SHIFT 4224 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h #define DVO_VREF_CONTROL__DVO_VREFCAL__SHIFT 0x4
DVO_VREF_CONTROL__DVO_VREFCAL__SHIFT 4688 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h #define DVO_VREF_CONTROL__DVO_VREFCAL__SHIFT 0x4
DVO_VREF_CONTROL__DVO_VREFCAL__SHIFT 10647 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h #define DVO_VREF_CONTROL__DVO_VREFCAL__SHIFT                                                                  0x4
DVO_VREF_CONTROL__DVO_VREFCAL__SHIFT 6740 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h #define DVO_VREF_CONTROL__DVO_VREFCAL__SHIFT 0x00000004
DVO_VREF_CONTROL__DVO_VREFCAL__SHIFT 4184 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_sh_mask.h #define DVO_VREF_CONTROL__DVO_VREFCAL__SHIFT 0x4
DVO_VREF_CONTROL__DVO_VREFCAL__SHIFT 41257 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_sh_mask.h #define DVO_VREF_CONTROL__DVO_VREFCAL__SHIFT                                                                  0x4