DVMM_PTE_PGMEM_CONTROL__DVMM_PTE5_MEM_PWR_DIS_MASK 2571 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h #define DVMM_PTE_PGMEM_CONTROL__DVMM_PTE5_MEM_PWR_DIS_MASK 0x20000
DVMM_PTE_PGMEM_CONTROL__DVMM_PTE5_MEM_PWR_DIS_MASK 2805 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h #define DVMM_PTE_PGMEM_CONTROL__DVMM_PTE5_MEM_PWR_DIS_MASK 0x20000
DVMM_PTE_PGMEM_CONTROL__DVMM_PTE5_MEM_PWR_DIS_MASK 4164 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h #define DVMM_PTE_PGMEM_CONTROL__DVMM_PTE5_MEM_PWR_DIS_MASK                                                    0x00020000L