DVMM_PTE_PGMEM_CONTROL__DVMM_PTE0_MEM_PWR_DIS_MASK 2551 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h #define DVMM_PTE_PGMEM_CONTROL__DVMM_PTE0_MEM_PWR_DIS_MASK 0x4
DVMM_PTE_PGMEM_CONTROL__DVMM_PTE0_MEM_PWR_DIS_MASK 2785 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h #define DVMM_PTE_PGMEM_CONTROL__DVMM_PTE0_MEM_PWR_DIS_MASK 0x4
DVMM_PTE_PGMEM_CONTROL__DVMM_PTE0_MEM_PWR_DIS_MASK 4154 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h #define DVMM_PTE_PGMEM_CONTROL__DVMM_PTE0_MEM_PWR_DIS_MASK                                                    0x00000004L