DSCC5_DSCC_PPS_CONFIG16__RANGE_MAX_QP1_MASK 53824 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h #define DSCC5_DSCC_PPS_CONFIG16__RANGE_MAX_QP1_MASK                                                           0x000003E0L
DSCC5_DSCC_PPS_CONFIG16__RANGE_MAX_QP1_MASK 47264 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_sh_mask.h #define DSCC5_DSCC_PPS_CONFIG16__RANGE_MAX_QP1_MASK                                                           0x000003E0L