DSCC5_DSCC_PPS_CONFIG15__RANGE_MIN_QP0_MASK 53813 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h #define DSCC5_DSCC_PPS_CONFIG15__RANGE_MIN_QP0_MASK                                                           0x001F0000L
DSCC5_DSCC_PPS_CONFIG15__RANGE_MIN_QP0_MASK 47253 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_sh_mask.h #define DSCC5_DSCC_PPS_CONFIG15__RANGE_MIN_QP0_MASK                                                           0x001F0000L