DSCC3_DSCC_PPS_CONFIG15__RANGE_MIN_QP0_MASK 52745 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h #define DSCC3_DSCC_PPS_CONFIG15__RANGE_MIN_QP0_MASK                                                           0x001F0000L
DSCC3_DSCC_PPS_CONFIG15__RANGE_MIN_QP0_MASK 46185 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_sh_mask.h #define DSCC3_DSCC_PPS_CONFIG15__RANGE_MIN_QP0_MASK                                                           0x001F0000L