DSCC0_DSCC_PPS_CONFIG1__CHUNK_SIZE__SHIFT 51039 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h #define DSCC0_DSCC_PPS_CONFIG1__CHUNK_SIZE__SHIFT                                                             0x10
DSCC0_DSCC_PPS_CONFIG1__CHUNK_SIZE__SHIFT 44479 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_sh_mask.h #define DSCC0_DSCC_PPS_CONFIG1__CHUNK_SIZE__SHIFT                                                             0x10