DSCC0_DSCC_PPS_CONFIG18__RANGE_MIN_QP5_MASK 51179 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h #define DSCC0_DSCC_PPS_CONFIG18__RANGE_MIN_QP5_MASK                                                           0x0000001FL
DSCC0_DSCC_PPS_CONFIG18__RANGE_MIN_QP5_MASK 44619 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_sh_mask.h #define DSCC0_DSCC_PPS_CONFIG18__RANGE_MIN_QP5_MASK                                                           0x0000001FL