DP_DPHY_HBR2_PATTERN_CONTROL_MODE 2773 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_enum.h typedef enum DP_DPHY_HBR2_PATTERN_CONTROL_MODE {
DP_DPHY_HBR2_PATTERN_CONTROL_MODE 2779 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_enum.h } DP_DPHY_HBR2_PATTERN_CONTROL_MODE;
DP_DPHY_HBR2_PATTERN_CONTROL_MODE 3210 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_enum.h typedef enum DP_DPHY_HBR2_PATTERN_CONTROL_MODE {
DP_DPHY_HBR2_PATTERN_CONTROL_MODE 3216 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_enum.h } DP_DPHY_HBR2_PATTERN_CONTROL_MODE;
DP_DPHY_HBR2_PATTERN_CONTROL_MODE 6126 drivers/gpu/drm/amd/include/navi10_enum.h typedef enum DP_DPHY_HBR2_PATTERN_CONTROL_MODE {
DP_DPHY_HBR2_PATTERN_CONTROL_MODE 6132 drivers/gpu/drm/amd/include/navi10_enum.h } DP_DPHY_HBR2_PATTERN_CONTROL_MODE;
DP_DPHY_HBR2_PATTERN_CONTROL_MODE 8570 drivers/gpu/drm/amd/include/vega10_enum.h typedef enum DP_DPHY_HBR2_PATTERN_CONTROL_MODE {
DP_DPHY_HBR2_PATTERN_CONTROL_MODE 8576 drivers/gpu/drm/amd/include/vega10_enum.h } DP_DPHY_HBR2_PATTERN_CONTROL_MODE;