DP_AUX_SW_CONTROL_LS_READ_TRIG 2828 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_enum.h typedef enum DP_AUX_SW_CONTROL_LS_READ_TRIG {
DP_AUX_SW_CONTROL_LS_READ_TRIG 2831 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_enum.h } DP_AUX_SW_CONTROL_LS_READ_TRIG;
DP_AUX_SW_CONTROL_LS_READ_TRIG 3265 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_enum.h typedef enum DP_AUX_SW_CONTROL_LS_READ_TRIG {
DP_AUX_SW_CONTROL_LS_READ_TRIG 3268 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_enum.h } DP_AUX_SW_CONTROL_LS_READ_TRIG;
DP_AUX_SW_CONTROL_LS_READ_TRIG 7348 drivers/gpu/drm/amd/include/navi10_enum.h typedef enum DP_AUX_SW_CONTROL_LS_READ_TRIG {
DP_AUX_SW_CONTROL_LS_READ_TRIG 7351 drivers/gpu/drm/amd/include/navi10_enum.h } DP_AUX_SW_CONTROL_LS_READ_TRIG;
DP_AUX_SW_CONTROL_LS_READ_TRIG 8832 drivers/gpu/drm/amd/include/vega10_enum.h typedef enum DP_AUX_SW_CONTROL_LS_READ_TRIG {
DP_AUX_SW_CONTROL_LS_READ_TRIG 8835 drivers/gpu/drm/amd/include/vega10_enum.h } DP_AUX_SW_CONTROL_LS_READ_TRIG;