DP_AUX_GTC_SYNC_CONTROL_INTERVAL_RESET_WINDOW 2950 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_enum.h typedef enum DP_AUX_GTC_SYNC_CONTROL_INTERVAL_RESET_WINDOW {
DP_AUX_GTC_SYNC_CONTROL_INTERVAL_RESET_WINDOW 2955 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_enum.h } DP_AUX_GTC_SYNC_CONTROL_INTERVAL_RESET_WINDOW;
DP_AUX_GTC_SYNC_CONTROL_INTERVAL_RESET_WINDOW 3387 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_enum.h typedef enum DP_AUX_GTC_SYNC_CONTROL_INTERVAL_RESET_WINDOW {
DP_AUX_GTC_SYNC_CONTROL_INTERVAL_RESET_WINDOW 3392 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_enum.h } DP_AUX_GTC_SYNC_CONTROL_INTERVAL_RESET_WINDOW;
DP_AUX_GTC_SYNC_CONTROL_INTERVAL_RESET_WINDOW 7562 drivers/gpu/drm/amd/include/navi10_enum.h typedef enum DP_AUX_GTC_SYNC_CONTROL_INTERVAL_RESET_WINDOW {
DP_AUX_GTC_SYNC_CONTROL_INTERVAL_RESET_WINDOW 7567 drivers/gpu/drm/amd/include/navi10_enum.h } DP_AUX_GTC_SYNC_CONTROL_INTERVAL_RESET_WINDOW;
DP_AUX_GTC_SYNC_CONTROL_INTERVAL_RESET_WINDOW 9054 drivers/gpu/drm/amd/include/vega10_enum.h typedef enum DP_AUX_GTC_SYNC_CONTROL_INTERVAL_RESET_WINDOW {
DP_AUX_GTC_SYNC_CONTROL_INTERVAL_RESET_WINDOW 9059 drivers/gpu/drm/amd/include/vega10_enum.h } DP_AUX_GTC_SYNC_CONTROL_INTERVAL_RESET_WINDOW;