DPP_TOP3_DPP_CONTROL__DPP_TEST_CLK_SEL__SHIFT 17274 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_sh_mask.h #define DPP_TOP3_DPP_CONTROL__DPP_TEST_CLK_SEL__SHIFT                                                         0x1c
DPP_TOP3_DPP_CONTROL__DPP_TEST_CLK_SEL__SHIFT 21389 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h #define DPP_TOP3_DPP_CONTROL__DPP_TEST_CLK_SEL__SHIFT                                                         0x1c
DPP_TOP3_DPP_CONTROL__DPP_TEST_CLK_SEL__SHIFT 18321 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_sh_mask.h #define DPP_TOP3_DPP_CONTROL__DPP_TEST_CLK_SEL__SHIFT                                                         0x1c