DPM_TABLE_95__GraphicsLevel_0_MinVoltage_Phases_MASK 1369 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h #define DPM_TABLE_95__GraphicsLevel_0_MinVoltage_Phases_MASK 0xff
DPM_TABLE_95__GraphicsLevel_0_MinVoltage_Phases_MASK 1787 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h #define DPM_TABLE_95__GraphicsLevel_0_MinVoltage_Phases_MASK 0xff