DPM_TABLE_52__VddciLevel_0_StdVoltageHiSidd_MASK  967 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h #define DPM_TABLE_52__VddciLevel_0_StdVoltageHiSidd_MASK 0xffff
DPM_TABLE_52__VddciLevel_0_StdVoltageHiSidd_MASK  967 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h #define DPM_TABLE_52__VddciLevel_0_StdVoltageHiSidd_MASK 0xffff
DPM_TABLE_52__VddciLevel_0_StdVoltageHiSidd_MASK 1613 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h #define DPM_TABLE_52__VddciLevel_0_StdVoltageHiSidd_MASK 0xffff