DPM_TABLE_47__VddcLevel_5_Smio_MASK  943 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h #define DPM_TABLE_47__VddcLevel_5_Smio_MASK 0xff00
DPM_TABLE_47__VddcLevel_5_Smio_MASK  943 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h #define DPM_TABLE_47__VddcLevel_5_Smio_MASK 0xff00
DPM_TABLE_47__VddcLevel_5_Smio_MASK 1589 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h #define DPM_TABLE_47__VddcLevel_5_Smio_MASK 0xff00