DPM_TABLE_440__Ulv_VddcOffsetVid_MASK 2365 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h #define DPM_TABLE_440__Ulv_VddcOffsetVid_MASK 0xff00
DPM_TABLE_440__Ulv_VddcOffsetVid_MASK 2367 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h #define DPM_TABLE_440__Ulv_VddcOffsetVid_MASK 0xff00