DPM_TABLE_40__VddcLevelCount_MASK 1063 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h #define DPM_TABLE_40__VddcLevelCount_MASK 0xffffffff
DPM_TABLE_40__VddcLevelCount_MASK 1475 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h #define DPM_TABLE_40__VddcLevelCount_MASK 0xffffffff