DPM_TABLE_380__UvdLevel_5_MinVddcPhases_MASK 2119 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h #define DPM_TABLE_380__UvdLevel_5_MinVddcPhases_MASK 0xff00
DPM_TABLE_380__UvdLevel_5_MinVddcPhases_MASK 2121 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h #define DPM_TABLE_380__UvdLevel_5_MinVddcPhases_MASK 0xff00