DPM_TABLE_333__LinkLevel_5_PcieGenSpeed_MASK 1955 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h #define DPM_TABLE_333__LinkLevel_5_PcieGenSpeed_MASK 0xff000000
DPM_TABLE_333__LinkLevel_5_PcieGenSpeed_MASK 1957 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h #define DPM_TABLE_333__LinkLevel_5_PcieGenSpeed_MASK 0xff000000