DPM_TABLE_30__SmioMaskVddcPhase_MASK  875 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h #define DPM_TABLE_30__SmioMaskVddcPhase_MASK 0xffffffff
DPM_TABLE_30__SmioMaskVddcPhase_MASK  875 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h #define DPM_TABLE_30__SmioMaskVddcPhase_MASK 0xffffffff
DPM_TABLE_30__SmioMaskVddcPhase_MASK 1521 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h #define DPM_TABLE_30__SmioMaskVddcPhase_MASK 0xffffffff