DP4_DP_SEC_CNTL1__DP_SEC_GSP0_SEND__SHIFT 42685 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h #define DP4_DP_SEC_CNTL1__DP_SEC_GSP0_SEND__SHIFT                                                             0x5
DP4_DP_SEC_CNTL1__DP_SEC_GSP0_SEND__SHIFT 36679 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_sh_mask.h #define DP4_DP_SEC_CNTL1__DP_SEC_GSP0_SEND__SHIFT                                                             0x5
DP4_DP_SEC_CNTL1__DP_SEC_GSP0_SEND__SHIFT 46560 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h #define DP4_DP_SEC_CNTL1__DP_SEC_GSP0_SEND__SHIFT                                                             0x5
DP4_DP_SEC_CNTL1__DP_SEC_GSP0_SEND__SHIFT 42623 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_sh_mask.h #define DP4_DP_SEC_CNTL1__DP_SEC_GSP0_SEND__SHIFT                                                             0x5