DP1_DP_SEC_CNTL__DP_SEC_ASP_ENABLE__SHIFT 39259 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h #define DP1_DP_SEC_CNTL__DP_SEC_ASP_ENABLE__SHIFT                                                             0x4
DP1_DP_SEC_CNTL__DP_SEC_ASP_ENABLE__SHIFT 32584 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_sh_mask.h #define DP1_DP_SEC_CNTL__DP_SEC_ASP_ENABLE__SHIFT                                                             0x4
DP1_DP_SEC_CNTL__DP_SEC_ASP_ENABLE__SHIFT 41924 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h #define DP1_DP_SEC_CNTL__DP_SEC_ASP_ENABLE__SHIFT                                                             0x4
DP1_DP_SEC_CNTL__DP_SEC_ASP_ENABLE__SHIFT 37981 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_sh_mask.h #define DP1_DP_SEC_CNTL__DP_SEC_ASP_ENABLE__SHIFT                                                             0x4