DP1_DP_SEC_CNTL2__DP_SEC_GSP5_SEND__SHIFT 32841 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_sh_mask.h #define DP1_DP_SEC_CNTL2__DP_SEC_GSP5_SEND__SHIFT                                                             0x10
DP1_DP_SEC_CNTL2__DP_SEC_GSP5_SEND__SHIFT 42201 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h #define DP1_DP_SEC_CNTL2__DP_SEC_GSP5_SEND__SHIFT                                                             0x10
DP1_DP_SEC_CNTL2__DP_SEC_GSP5_SEND__SHIFT 38258 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_sh_mask.h #define DP1_DP_SEC_CNTL2__DP_SEC_GSP5_SEND__SHIFT                                                             0x10