DP1_DP_SEC_CNTL2__DP_SEC_GSP3_SEND__SHIFT 32833 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_sh_mask.h #define DP1_DP_SEC_CNTL2__DP_SEC_GSP3_SEND__SHIFT                                                             0x8
DP1_DP_SEC_CNTL2__DP_SEC_GSP3_SEND__SHIFT 42193 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h #define DP1_DP_SEC_CNTL2__DP_SEC_GSP3_SEND__SHIFT                                                             0x8
DP1_DP_SEC_CNTL2__DP_SEC_GSP3_SEND__SHIFT 38250 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_sh_mask.h #define DP1_DP_SEC_CNTL2__DP_SEC_GSP3_SEND__SHIFT                                                             0x8