DP0_DP_SEC_CNTL2__DP_SEC_GSP7_PPS__SHIFT 31498 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_sh_mask.h #define DP0_DP_SEC_CNTL2__DP_SEC_GSP7_PPS__SHIFT                                                              0x1c
DP0_DP_SEC_CNTL2__DP_SEC_GSP7_PPS__SHIFT 40678 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h #define DP0_DP_SEC_CNTL2__DP_SEC_GSP7_PPS__SHIFT                                                              0x1c
DP0_DP_SEC_CNTL2__DP_SEC_GSP7_PPS__SHIFT 36733 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_sh_mask.h #define DP0_DP_SEC_CNTL2__DP_SEC_GSP7_PPS__SHIFT                                                              0x1c