DP0_DP_SEC_CNTL2__DP_SEC_GSP1_SEND__SHIFT 31470 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_sh_mask.h #define DP0_DP_SEC_CNTL2__DP_SEC_GSP1_SEND__SHIFT                                                             0x0
DP0_DP_SEC_CNTL2__DP_SEC_GSP1_SEND__SHIFT 40650 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h #define DP0_DP_SEC_CNTL2__DP_SEC_GSP1_SEND__SHIFT                                                             0x0
DP0_DP_SEC_CNTL2__DP_SEC_GSP1_SEND__SHIFT 36705 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_sh_mask.h #define DP0_DP_SEC_CNTL2__DP_SEC_GSP1_SEND__SHIFT                                                             0x0