DP0_DP_DPHY_CRC_RESULT__DPHY_CRC_RESULT2__SHIFT 38075 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h #define DP0_DP_DPHY_CRC_RESULT__DPHY_CRC_RESULT2__SHIFT                                                       0x10
DP0_DP_DPHY_CRC_RESULT__DPHY_CRC_RESULT2__SHIFT 31189 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_sh_mask.h #define DP0_DP_DPHY_CRC_RESULT__DPHY_CRC_RESULT2__SHIFT                                                       0x10
DP0_DP_DPHY_CRC_RESULT__DPHY_CRC_RESULT2__SHIFT 40349 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h #define DP0_DP_DPHY_CRC_RESULT__DPHY_CRC_RESULT2__SHIFT                                                       0x10
DP0_DP_DPHY_CRC_RESULT__DPHY_CRC_RESULT2__SHIFT 36404 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_sh_mask.h #define DP0_DP_DPHY_CRC_RESULT__DPHY_CRC_RESULT2__SHIFT                                                       0x10