DP0_DP_ALPM_CNTL__DP_ML_PHY_STANDBY_SEND__SHIFT 40808 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h #define DP0_DP_ALPM_CNTL__DP_ML_PHY_STANDBY_SEND__SHIFT                                                       0x2
DP0_DP_ALPM_CNTL__DP_ML_PHY_STANDBY_SEND__SHIFT 36863 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_sh_mask.h #define DP0_DP_ALPM_CNTL__DP_ML_PHY_STANDBY_SEND__SHIFT                                                       0x2