DMIF_STATUS__DMIF_CLEAR_MC_SEND_ON_IDLE__SHIFT 2104 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h #define DMIF_STATUS__DMIF_CLEAR_MC_SEND_ON_IDLE__SHIFT 0x8
DMIF_STATUS__DMIF_CLEAR_MC_SEND_ON_IDLE__SHIFT 2024 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h #define DMIF_STATUS__DMIF_CLEAR_MC_SEND_ON_IDLE__SHIFT 0x8
DMIF_STATUS__DMIF_CLEAR_MC_SEND_ON_IDLE__SHIFT 2216 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h #define DMIF_STATUS__DMIF_CLEAR_MC_SEND_ON_IDLE__SHIFT 0x8
DMIF_STATUS__DMIF_CLEAR_MC_SEND_ON_IDLE__SHIFT 3536 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h #define DMIF_STATUS__DMIF_CLEAR_MC_SEND_ON_IDLE__SHIFT                                                        0x8
DMIF_STATUS__DMIF_CLEAR_MC_SEND_ON_IDLE__SHIFT 6086 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h #define DMIF_STATUS__DMIF_CLEAR_MC_SEND_ON_IDLE__SHIFT 0x00000008
DMIF_STATUS__DMIF_CLEAR_MC_SEND_ON_IDLE__SHIFT 2294 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_sh_mask.h #define DMIF_STATUS__DMIF_CLEAR_MC_SEND_ON_IDLE__SHIFT 0x8