DMIF_STATUS2__DMIF_PIPE5_DISPCLK_STATUS__SHIFT 2190 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h #define DMIF_STATUS2__DMIF_PIPE5_DISPCLK_STATUS__SHIFT 0x5
DMIF_STATUS2__DMIF_PIPE5_DISPCLK_STATUS__SHIFT 2114 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h #define DMIF_STATUS2__DMIF_PIPE5_DISPCLK_STATUS__SHIFT 0x5
DMIF_STATUS2__DMIF_PIPE5_DISPCLK_STATUS__SHIFT 2310 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h #define DMIF_STATUS2__DMIF_PIPE5_DISPCLK_STATUS__SHIFT 0x5
DMIF_STATUS2__DMIF_PIPE5_DISPCLK_STATUS__SHIFT 3606 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h #define DMIF_STATUS2__DMIF_PIPE5_DISPCLK_STATUS__SHIFT                                                        0x5
DMIF_STATUS2__DMIF_PIPE5_DISPCLK_STATUS__SHIFT 6084 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h #define DMIF_STATUS2__DMIF_PIPE5_DISPCLK_STATUS__SHIFT 0x00000005
DMIF_STATUS2__DMIF_PIPE5_DISPCLK_STATUS__SHIFT 2356 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_sh_mask.h #define DMIF_STATUS2__DMIF_PIPE5_DISPCLK_STATUS__SHIFT 0x5