DMCU_INTERRUPT_STATUS_1__OTG2_RANGE_TIMING_UPDATE_CLEAR__SHIFT 3889 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_sh_mask.h #define DMCU_INTERRUPT_STATUS_1__OTG2_RANGE_TIMING_UPDATE_CLEAR__SHIFT                                        0x8
DMCU_INTERRUPT_STATUS_1__OTG2_RANGE_TIMING_UPDATE_CLEAR__SHIFT 2663 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h #define DMCU_INTERRUPT_STATUS_1__OTG2_RANGE_TIMING_UPDATE_CLEAR__SHIFT                                        0x8
DMCU_INTERRUPT_STATUS_1__OTG2_RANGE_TIMING_UPDATE_CLEAR__SHIFT 2395 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_sh_mask.h #define DMCU_INTERRUPT_STATUS_1__OTG2_RANGE_TIMING_UPDATE_CLEAR__SHIFT                                        0x8