DMCU_INTERRUPT_STATUS_1__DCFEV0_VBLANK_INT_CLEAR_MASK 7993 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h #define DMCU_INTERRUPT_STATUS_1__DCFEV0_VBLANK_INT_CLEAR_MASK 0x10
DMCU_INTERRUPT_STATUS_1__DCFEV0_VBLANK_INT_CLEAR_MASK 5305 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h #define DMCU_INTERRUPT_STATUS_1__DCFEV0_VBLANK_INT_CLEAR_MASK                                                 0x00000010L