DMCU_EVENT_TRIGGER__UC_INTERNAL_INT_CODE__SHIFT 6822 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h #define DMCU_EVENT_TRIGGER__UC_INTERNAL_INT_CODE__SHIFT 0x10
DMCU_EVENT_TRIGGER__UC_INTERNAL_INT_CODE__SHIFT 6716 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h #define DMCU_EVENT_TRIGGER__UC_INTERNAL_INT_CODE__SHIFT 0x10
DMCU_EVENT_TRIGGER__UC_INTERNAL_INT_CODE__SHIFT 7796 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h #define DMCU_EVENT_TRIGGER__UC_INTERNAL_INT_CODE__SHIFT 0x10
DMCU_EVENT_TRIGGER__UC_INTERNAL_INT_CODE__SHIFT 4737 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h #define DMCU_EVENT_TRIGGER__UC_INTERNAL_INT_CODE__SHIFT                                                       0x10
DMCU_EVENT_TRIGGER__UC_INTERNAL_INT_CODE__SHIFT 5686 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h #define DMCU_EVENT_TRIGGER__UC_INTERNAL_INT_CODE__SHIFT 0x00000010
DMCU_EVENT_TRIGGER__UC_INTERNAL_INT_CODE__SHIFT 7778 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_sh_mask.h #define DMCU_EVENT_TRIGGER__UC_INTERNAL_INT_CODE__SHIFT 0x10
DMCU_EVENT_TRIGGER__UC_INTERNAL_INT_CODE__SHIFT 3707 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_sh_mask.h #define DMCU_EVENT_TRIGGER__UC_INTERNAL_INT_CODE__SHIFT                                                       0x10
DMCU_EVENT_TRIGGER__UC_INTERNAL_INT_CODE__SHIFT 2481 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h #define DMCU_EVENT_TRIGGER__UC_INTERNAL_INT_CODE__SHIFT                                                       0x10
DMCU_EVENT_TRIGGER__UC_INTERNAL_INT_CODE__SHIFT 2213 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_sh_mask.h #define DMCU_EVENT_TRIGGER__UC_INTERNAL_INT_CODE__SHIFT                                                       0x10