DMCUB_MEM_PWR_CNTL__DMCUB_MEM_PWR_STATE_MASK 54615 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h #define DMCUB_MEM_PWR_CNTL__DMCUB_MEM_PWR_STATE_MASK                                                          0x00000030L
DMCUB_MEM_PWR_CNTL__DMCUB_MEM_PWR_STATE_MASK 48055 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_sh_mask.h #define DMCUB_MEM_PWR_CNTL__DMCUB_MEM_PWR_STATE_MASK                                                          0x00000030L