DISP_INTERRUPT_STATUS__CRTC1_TRIGA_INTERRUPT__SHIFT 14893 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h #define DISP_INTERRUPT_STATUS__CRTC1_TRIGA_INTERRUPT__SHIFT 0x7
DISP_INTERRUPT_STATUS__CRTC1_TRIGA_INTERRUPT__SHIFT 15039 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h #define DISP_INTERRUPT_STATUS__CRTC1_TRIGA_INTERRUPT__SHIFT 0x7
DISP_INTERRUPT_STATUS__CRTC1_TRIGA_INTERRUPT__SHIFT 15703 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h #define DISP_INTERRUPT_STATUS__CRTC1_TRIGA_INTERRUPT__SHIFT 0x7
DISP_INTERRUPT_STATUS__CRTC1_TRIGA_INTERRUPT__SHIFT 7970 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h #define DISP_INTERRUPT_STATUS__CRTC1_TRIGA_INTERRUPT__SHIFT                                                   0x7
DISP_INTERRUPT_STATUS__CRTC1_TRIGA_INTERRUPT__SHIFT 5596 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h #define DISP_INTERRUPT_STATUS__CRTC1_TRIGA_INTERRUPT__SHIFT 0x00000007
DISP_INTERRUPT_STATUS__CRTC1_TRIGA_INTERRUPT__SHIFT 6896 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_sh_mask.h #define DISP_INTERRUPT_STATUS__CRTC1_TRIGA_INTERRUPT__SHIFT 0x7