DIO_MEM_PWR_STATUS__HDMI6_MEM_PWR_STATE_MASK 27414 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_sh_mask.h #define DIO_MEM_PWR_STATUS__HDMI6_MEM_PWR_STATE_MASK                                                          0x00C00000L
DIO_MEM_PWR_STATUS__HDMI6_MEM_PWR_STATE_MASK 36550 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h #define DIO_MEM_PWR_STATUS__HDMI6_MEM_PWR_STATE_MASK                                                          0x00C00000L